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Lattice Semiconductor
Turbo Decoder User’s Guide
Note: Signals are transferred on the rising edge. N is the block size.
Figure 5 shows the timing for data output. Once the Turbo Decoder has completed processing the data for a given
number of iterations it is ready to output the hard decision data. The decoder indicates this by asserting signal rfo .
Once the user detects this signal, rfno can be asserted to indicate that the output data can be received on the
output port dout . Thus for every rfno asserted the decoder will output the hard decision on the output port dout .
Once the decoder has output all data it will lower the rfo signal.
Figure 5. Decoder Output When Processing is Done
Note: Signals are transferred on the rising edge. N is the block size .
Figure 6 illustrates how inpvalid can be used to control the ?ow of data into the decoder. The input data is
received in conjunction with input signal inpvalid . When inpvalid is asserted the input data on port din is
taken as valid data and written into the input data memory buffer. When the input port inpvalid is de-asserted,
the Turbo Decoder core ignores the value on din .
Figure 6. Input Data Handshaking with inpvalid Going Low
Note: Signals are transferred on the rising edge. N is the block size.
Figure 7 shows how rfno can be used to control the ?ow of data from the Turbo Decoder core. The output hand-
shake signals are rfo and rfno . Once the decoder is ready to give out the hard decision data it asserts rfo . The
receiving system will then assert the rfno signal when it is ready to receive the data. The decoder now puts the
hard decision data value on the port dout . When the decoder has output the last data it lowers rfo to indicate that
no more hard decision data is available in the decoder.
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